LeanRISC @LeanRISC

Lean RISC leanrisc.com Joined March 2021

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RISC-V India @riscv_india

5 years ago

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Adarsh Cloud @AdarshClou95478

0 Followers 28 Following

COVERIFY @coverify

349 Followers 151 Following Software Assisted Hardware Verification

Puneet Goel @coverification

163 Followers 150 Following Co-Founder @coverify Developer @EmbeddedUVM

RISC-V India @riscv_india

39 Followers 101 Following RISC-V Indian Developers Forum

Olof Kindgren @OlofKindgren

7K Followers 59 Following No longer active here. Moved to other similar platforms

Where the #OpenSource #digital #hardware #community meets. Find IP cores. Learn to use them. Release your own designs. Supported by @FossiFoundation

LibreCores @librecores

2K Followers 742 Following Where the #OpenSource #digital #hardware #community meets. Find IP cores. Learn to use them. Release your own designs. Supported by @FossiFoundation

A non-profit, global organisation where hardware and software designers collaborate in the development of open source cores, related IP, tools and software.

OpenHW Foundation @OpenHWFdn

5K Followers 185 Following A non-profit, global organisation where hardware and software designers collaborate in the development of open source cores, related IP, tools and software.

RISC-V India @riscv_india

39 Followers 101 Following RISC-V Indian Developers Forum

A joint effort of @ETH_en, University of Bologna @Unibo + partners for Parallel Ultra-Low Power computing. Boldly designing open hardware since '13.

PULP Platform @pulp_platform

8K Followers 1K Following A joint effort of @ETH_en, University of Bologna @Unibo + partners for Parallel Ultra-Low Power computing. Boldly designing open hardware since '13.

RISC-V International is the non-profit home of the open standard RISC-V Instruction Set Architecture (ISA), related specifications, and stakeholder community.

RISC-V International @risc_v

34K Followers 480 Following RISC-V International is the non-profit home of the open standard RISC-V Instruction Set Architecture (ISA), related specifications, and stakeholder community.

RISC-V 32-Bit project. System Hyper Pipelining, Dynamic Multithreading, Wave-Pipelining, MultiCore Arduino on FPGA and ASIC, Virtual Peripherals.

Arduissimo @arduissimo

3K Followers 2K Following RISC-V 32-Bit project. System Hyper Pipelining, Dynamic Multithreading, Wave-Pipelining, MultiCore Arduino on FPGA and ASIC, Virtual Peripherals.