BreakingTaps @BreakingTaps

Material Science, Microfabrication, Microscopy He/him. @[email protected] (Fedi) / @breakingtaps.com (Blue) youtube.com/c/BreakingTaps/ Joined December 2020

Tweets

5K
Followers

10K
Following

506
Likes

9K

Project KegRocket @kegrocket

2 days ago

KegRocket Episode 6 is now out. Go check out our Wet Dress Rehearsal/cryo tanking test! youtu.be/BvubuV_QQGo

3 7 51 3K 3

View Details

@Daniel00Higgins @MichaelAlleged @recliner_pilott What? I can't speak to the bracket design itself, but it's a perfectly fine 5 axis part, toolpaths and fixturing. Two op prismatic is like the bread and butter of 5ax.

0 0 1 15 0

View Details

BreakingTaps @BreakingTaps

4 days ago

@gak_pdx @heavenlyf33t "It's ok little OM2a, don't listen to all these mean people on the internet" 😄

1 0 3 68 0

View Details

BreakingTaps @BreakingTaps

5 days ago

@kegrocket Amaze! Amaze! Amaze!

0 0 3 367 0

View Details

BreakingTaps @BreakingTaps

a week ago

@Spirit532_ @mergedotclub @mcmgoodall @julianweisser @aridutilh Hell yeah, congrats man! Looking forward to it!

0 0 5 241 0

View Details

BreakingTaps @BreakingTaps

2 weeks ago

@andrewmccalip Feels very early 2000's AllAdvantage ad bar. 😂

0 0 8 867 1

View Details

BreakingTaps @BreakingTaps

2 weeks ago

@MattGialich twinsies 😄 That's a lovely looking bit of hardware! Do you know what the blue dots are for? Markers for the fasteners?

1 0 18 652 1

View Details

BreakingTaps @BreakingTaps

2 weeks ago

@BoganBits @yacineMTB I've variously heard that Chisel/SpinalHDL, Amaranth and Veryl are seeing some industry adoption. Mostly on the fringes, and mostly because they transpile to SV. But still, progress :) I've been using Spade personally, it's nice

0 0 0 159 1

View Details

BreakingTaps @BreakingTaps

3 weeks ago

That feeling when you realize tapeout is in less than a month and you're still trying to decide on a project 😨 Think I'm gonna make a raytracing accelerator. I can't afford a new GPU so might as well make my own 🦾

3 1 49 6K 4

View Details

BreakingTaps @BreakingTaps

3 weeks ago

@MattGialich @thejackbeyer 👌 Rad, rock on. Been loving the updates lately about what's happening inside Astroforge btw! Very cool to see inside :)

1 0 1 33 0

View Details

BreakingTaps @BreakingTaps

3 weeks ago

@thejackbeyer @MattGialich Heh, I was going to comment that the floor seems pretty rough. But if this was pre-finishing I will forgive :) (Use a dedicated floor finisher with wiping flats!)

1 0 2 20 0

View Details

BreakingTaps @BreakingTaps

3 weeks ago

@BoganBits @yacineMTB I actually have still never used an FPGA 😅 Since my eventual target is ASIC, it gets weird with memory and I'm too lazy to figure out how to make it work. So tests + simulation then synthesize for hardware and yolo

0 0 0 32 0

View Details

BreakingTaps @BreakingTaps

3 weeks ago

@BoganBits @yacineMTB Yep this! Pick a modern HDL (or verilog if you hate yourself) and start slinging code. Simulation and tests go a long way to proving behavior. Cocotb/iverilog/verilator. Can dump waveform files which you can load in viewers for debugging (I use surfer: surfer-project.org)

2 0 1 166 1

View Details

BreakingTaps @BreakingTaps

3 weeks ago

Quickie 128 x 128 ray traced test of the Cornell Box. None of the hard stuff is built (memory management), but the core tracer went together pretty easy! 🙂 Horribly wasteful single-clock-per-bounce implementation though lol. Time to pipeline!

BreakingTaps @BreakingTaps

3 weeks ago

3 1 49 6K 4

1 1 24 2K 3

View Details

BreakingTaps @BreakingTaps

3 weeks ago

@tkanarsky Hah well it probably won't actually accelerate compared to a real GPU. 😅 But a lot of the intersection and bounce math can be wired into hardware pretty efficiently, so I think it'll still be a neat demo compared to like a microprocessor trying to do the same

0 0 2 55 0

View Details

BreakingTaps @BreakingTaps

3 weeks ago

@EricVallieres84 Model yes, but I just rough out the main feature's bounding box. I find it not worthwhile to get too detailed. If I'm checking mm clearance on a chamfer it's not a good day in general 😅

0 0 6 319 0

View Details

BreakingTaps @BreakingTaps

3 weeks ago

@yacineMTB Probably! Still sussing out architecture, but probably something like: load scene objects into chip's SRAM, assign rays to a systolic array of processing units, flow scene through array and record pixel value at end. Repeat for secondary rays. Then array many chips on one PCB

1 0 3 462 1

View Details

BreakingTaps @BreakingTaps

3 weeks ago

@MattDIYgraphics @r0b0t_sp1der Not sure! Probably give some away to patreons and friends, maybe see if folks want to buy them to play around with. Capability is pretty meh, but it's a unique computing architecture that isn't seen often (transport triggered) so fun to build compilers and stuff for.

1 0 1 24 0

View Details

BreakingTaps @BreakingTaps

2 months ago

Hard to describe the feeling of holding silicon in your hand that you've designed 🥺

BreakingTaps @BreakingTaps

2 months ago

First bare dies are here! 🤩 Microscope images soon!

13 10 291 45K 21

18 25 781 65K 80

View Details

BreakingTaps @BreakingTaps

3 weeks ago

@MattDIYgraphics @r0b0t_sp1der No TinyTapeout experience, but I don't think it was much more difficult than a TT run. The wafer.space admins provided a really great template that automated build and DRC, pre-built pad ring with IO and ESD etc. I just dropped in my RTL and hit compile (mostly 😅)

1 0 1 37 0

View Details

BreakingTaps @BreakingTaps

4 weeks ago

@KevinRBing @sendcutsend Tools in the machine. When you load a tool, you remove the tag and put it in the corresponding pocket number. Makes it easy to glance at the tags to see what's loaded.